ADT7476EBZEVB【PDF 22/65 页】BOARD EVALUATION FOR ADT7476

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ADT7476

Table 30. INTERRUPT MASK REGISTER 1

(REG. 0X74)

chooses the required functionality by setting Bit 0 and Bit 1

of Configuration Register 4 (0x7D).

Bit

7

6

5

4

3

Mnemonic

OOL

R2T

LT

R1T

5.0 V

Description

1 masks SMBALERT for any alert

condition flagged in Interrupt Status

Register 2.

1 masks SMBALERT for Remote 2

temperature.

1 masks SMBALERT for Local

temperature.

1 masks SMBALERT for Remote 1

temperature.

1 masks SMBALERT for the 5.0 V

channel.

If THERM is enabled on Bit 1, Configuration Register 3

(0x78):

? Pin 22 becomes THERM.

? If Pin 14 is configured as THERM on Bit 0 and Bit 1 of

Configuration Register 4 (0x7D), THERM is enabled

on this pin.

If THERM is not enabled:

? Pin 22 becomes a 2.5 V measurement input.

? If Pin 14 is configured as THERM, then THERM is

disabled on this pin.

2

1

V CC

V CCP

1 masks SMBALERT for the V CC

channel.

1 masks SMBALERT for the V CCP

channel.

Table 33. CONFIGURING PIN 14

Bit 1 Bit 0

0 0

Function

TACH4

0

2.5 V

1 masks SMBALERT for the

2.5 V IN /THERM channel.

0

1

1

0

THERM

SMBALERT

Table 31. INTERRUPT MASK REGISTER 2

1

1

GPIO6

(REG. 0X75)

Bit Mnemonic

Description

THERM as an Input

When THERM is configured as an input, the user can time

7

6

5

4

3

2

1

0

D2

D1

FAN4

FAN3

FAN2

FAN1

OVT

12 V/VC

1 masks SMBALERT for Diode 2 errors.

1 masks SMBALERT for Diode 1 errors.

1 masks SMBALERT for Fan 4 failure. If

the TACH4 pin is being used as the

THERM input, this bit masks

SMBALERT for a THERM event. If the

TACH4 pin is being used as GPIO6,

setting this bit masks interrupts related

to GPIO6.

1 masks SMBALERT for Fan 3.

1 masks SMBALERT for Fan 2.

1 masks SMBALERT for Fan 1.

1 masks SMBALERT for

overtemperature (exceeding THERM

limits).

1 masks SMBALERT for 12 V channel

or for a VID code change, depending on

the function used.

assertions on the THERM pin. This can be useful for

connecting to the PROCHOT output of a CPU to gauge

system performance.

When the THERM pin is driven low externally, the user

can also set up the ADT7476 to run the fans at 100%. The

fans run at 100% for the duration of time that the THERM

pin is pulled low. This is done by setting the BOOST bit

(Bit 2) in Configuration Register 3 (0x78) to 1. This works

only if the fan is already running, for example, in manual

mode, when the current duty cycle is above 0x00, or in

automatic mode when the temperature is above T MIN .

If the temperature is below T MIN or if the duty cycle in

manual mode is set to 0x00, pulling the THERM low

externally has no effect. See Figure 31 for more information.

T MIN

Enabling the SMBALERT Interrupt Output

The SMBALERT interrupt function is disabled by

default. Pin 10 or Pin 14 can be reconfigured as an

SMBALERT output to signal out-of-limit conditions.

Table 32. CONFIGURING PIN 10 AS SMBALERT

OUTPUT

THERM

Register

Configuration Register 3

(0x78)

Bit Setting

[1] Pin 10 = SMBALERT

[0] Pin 10 = PWM2

THERM ASSERTED TO LOW AS

AN INPUT: FANS DO NOT GO

TO 100% BECAUSE TEMPERATURE

IS BELOW T MIN

THERM ASSERTED TO LOW AS

AN INPUT: FANS GO TO 100%

BECAUSE TEMPERATURE IS

ABOVE T MIN AND FANS ARE

ALREADY RUNNING.

Assigning THERM Functionality to a Pin

Pin 14 on the ADT7476 has four possible functions:

SMBALERT, THERM, GPIO6, and TACH4. The user

Figure 31. Asserting THERM Low as an Input in

Automatic Fan Speed Control Mode

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